Polishing processes are used in the manufacturing of microelectronic devices to form flat surfaces on semiconductor wafers, field emission displays, and other microelectronic substrates. For example, the manufacture of semiconductor devices generally involves the formation of various process layers, selective removal or patterning of portions of those layers, and deposition of yet additional process layers above the surface of a semiconducting substrate to form a semiconductor wafer. The process layers can include, by way of example, insulation layers, gate oxide layers, conductive layers, and layers of metal or glass, etc. It is generally desirable in certain steps of the wafer process that the uppermost surface of the process layers be planar, i.e., flat, for the deposition of subsequent layers. Polishing processes such as chemical-mechanical polishing (“CMP”) are used to planarize process layers wherein a deposited material, such as a conductive or insulating material, is polished to planarize the wafer for subsequent process steps.
In a typical CMP process, a wafer is mounted upside down on a carrier in a CMP tool. A force pushes the carrier and the wafer downward toward a polishing pad supported on the CMP tool's polishing table or platen. The carrier and the wafer are rotated above the rotating polishing pad on the polishing table or platen. A polishing composition (also referred to as a polishing slurry) generally is introduced between the rotating wafer and the rotating polishing pad during the polishing process. The polishing composition typically contains a chemical that interacts with or dissolves portions of the uppermost wafer layer(s) and an abrasive material that physically removes portions of the layer(s). The wafer and the polishing pad can be rotated in the same direction or in opposite directions, whichever is desirable for the particular polishing process being carried out. The carrier also can oscillate across the polishing pad on the polishing table or platen. To reduce rapid wearing of the polishing pad, improve polishing uniformity, and facilitate slurry introduction between the rotating polishing pad and the wafer, conventional CMP processes use a polishing pad and polishing table that are much larger in size than the wafer to be polished. For example, to polish a 12 inch (about 30 centimeters) wafer, a 34 inch (about 86 centimeters) polishing pad is typically employed.
Recently, a new polishing process referred to as electrochemical-mechanical polishing (“ECMP”) has come into common use. ECMP can remove conductive material from a substrate surface by electrochemical dissolution in addition to performing the chemical and mechanical abrasion removal techniques common to CMP processes. The electrochemical dissolution is performed by applying an electrical bias between a cathode and a substrate surface to remove conductive materials from the substrate surface and into a surrounding electrolyte solution. However, conventional polishing pads often restrict the flow of electrolyte solution to the surface of the wafer, resulting in non-uniformity of the applied electric bias and hindering the polishing process. Furthermore, the addition of electrochemical dissolution in the ECMP process allows for reduction of the oscillating motion of the polishing pad and the associated energy expenditure required, as well as allowing reduction of the polishing pad and polishing table size.
Accordingly, there is a need for an improved polishing system that facilitates the introduction of electrolyte solution to the surface of the substrate to be polished. There is also a need for an improved polishing system that enables realization of the advantages of the ECMP process. The invention provides such a polishing system. These and other advantages of the invention, as well as additional inventive features, will be apparent from the description of the invention provided herein.